1. Technology Field
The present invention relates to a read voltage setting method, and a control circuit, and a memory storage apparatus using the same.
2. Description of Related Art
Along with the widespread of digital cameras, cell phones, and MP3 in recently years, the consumers' demand for storage media has increased drastically. Since a rewritable non-volatile memory has the characteristics of non-volatility of data, low power consumption, small volume, non-mechanical structure, and fast reading and writing speed, the rewritable non-volatile memory is the most adaptable memory to be applied in a portable electronic product, e.g., a notebook computer. A solid state drive (SSD) is a storage apparatus which utilizes a flash memory as its storage medium. Therefore, the flash memory industry has become a very popular part of the electronic industry in recent years.
FIG. 1 is a schematic diagram illustrating a flash memory device according to the related art.
Referring to FIG. 1, a flash memory device 1 includes a charge-trapping layer 2 for storing electrons, a control gate 3 for applying a voltage, a tunnel oxide layer 4, and an interpoly dielectric layer 5. When it is intended to write data into the flash memory device 1, a threshold voltage of the flash memory device 1 may be changed by injecting electrons into the charge-trapping layer 2. Accordingly, a digital-level state of the flash memory device 1 is defined to implement a function of storing data. Here, the process of injecting the electrons to the charge-trapping layer 2 is referred to as a programming process. By contrast, when it is intended to remove the stored data, the injected electrons are removed from the charge-trapping layer 2, and thereby the flash memory device 1 is restored back to the default state before programming.
However, during the manufacture of the flash memory device 1, a critical voltage distribution of the flash memory device 1 may shift due to the variation of the manufacturing process. As a result, the storage state of the flash memory device 1 is unlikely to be identified accurately, which results in the occurrence of error bits.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.